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COP8ACC5 bảng dữ liệu(PDF) 21 Page - National Semiconductor (TI) |
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COP8ACC5 bảng dữ liệu(HTML) 21 Page - National Semiconductor (TI) |
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21 / 41 page ![]() Analog Function Block (Continued) TABLE 4. Comparator Input Selection Control Bit Comparator Comparator Output Input Source CMPISEL2 CMPISEL1 CMPISEL0 Neg. Pos. Input Input 0 0 0 I1 I2 CH2 I3 0 0 1 I1 I2 CH2 I7 0 1 0 I1 I3 CH3 I7 0 1 1 I1 I0 CH1 I7 1 0 0 I1 I4 CH4 I7 1 0 1 I1 I5 CH5 I7 1 1 0 I1 I6 CH6 I7 111 I1 V CC/2 I7 Ref. Reset The state of the Analog Block immediately after RESET is as follows: 1. The CMPSL Register is set to all zeros 2. The Comparator is disabled 3. The Constant Current Source is disabled 4. CMPNEG is turned off 5. The Port I inputs are electrically isolated from the com- parator 6. The Capture Timer input is connected to GND 7. CMPISEL0–CMPISEL2 are set to zero 8. All Port I inputs are selected to the default digital input mode The comparator outputs have the same specification as Ports L and G except that the rise and fall times are sym- metrical. Interrupts INTRODUCTION Each device supports eight vectored interrupts. Interrupt sources include Timer 0, Timer 1, Timer 2, Timer 3, Port L Wakeup, Software Trap, MICROWIRE/PLUS, and External Input. All interrupts force a branch to location 00FF Hex in program memory. The VIS instruction may be used to vector to the appropriate service routine from location 00FF Hex. The Software trap has the highest priority while the default VIS has the lowest priority. Each of the 8 maskable inputs has a fixed arbitration ranking and vector. Figure 14 shows the Interrupt Block Diagram. www.national.com 21 |
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