COP888EB datasheet(11/75 Pages) NSC

11 / 75 page

Typical Performance Characteristics (−55˚C ≤ T

A = +125˚C) (Continued)

Pin Description

CC and GND are the power supply pins.

CKI is the clock input. The clock can come from a crystal os-

cillator (in conjunction with CKO). See Oscillator Description

section.

RESET is the master reset input. See Reset Description sec-

tion.

The device contains seven bidirectional 8-bit I/O ports (C, E,

F, G, L, M, N) where each individual bit may be indepen-

dently configured as an input (Schmitt trigger inputs on all

ports), output or TRI-STATE under program control. Three

data memory address locations are allocated for each of

these I/O ports. Each I/O port has two associated 8-bit

memory mapped registers, the CONFIGURATION register

and the output DATA register. A memory mapped address is

also reserved for the input pins of each I/O port. (See the

memory map for the various addresses associated with the

I/O ports.)

Figure 5 shows the I/O port configurations for the

device. The DATA and CONFIGURATION registers allow for

each port bit to be individually configured under software

control as shown below:

Configuration

Data

Port Set-Up

Hi-Z Input

(TRI-STATE Output)

Input with Weak Pull-Up

Push-Pull Zero Output

Push-Pull One Output

Port L and M are 8-bit I/O ports, they support Multi-Input

Wake-up (MIWU) on all eight pins. All L-pins and M-pins

have Schmitt triggers on the inputs.

Port L and M only have one (1) interrupt vector.

Port L has the following alternate features:

MIWU

MIWU or RDX

MIWU or TDX

MIWU or CKX

MIWU

Port G is an 8-bit port with 5 I/O pins (G0–G5), an input pin

(G6), and one dedicated output pin (G7). Pins G0–G6 all

have Schmitt Triggers on their inputs. G7 serves as the dedi-

cated output pin for the CKO clock output. There are two reg-

isters associated with the G Port, a data register and a con-

figuration register. Therefore, each of the 6 I/O bits (G0–G5)

can be individually configured under software control.

Since G6 is an input only pin and G7 is the dedicated CKO

clock output pin the associated bits in the data and configu-

ration registers for G6 and G7 are used for special purpose

functions as outlined below. Reading the G6 and G7 data

bits will return zeroes.

Note that the chip will be placed in the HALT mode by wirting

a ’’1” to bit 7 of the Port G Data Register. Similarly the chip

will be placed in the IDLE mode by writing a “1” to bit 6 of the

Port G Data Register.

DS012837-61

DS012837-6

FIGURE 5. I/O Port Configurations

COP888EB bảng dữ liệu(PDF) 11 Page - National Semiconductor (TI)

COP888EB bảng dữ liệu(HTML) 11 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75

bảng dữ liệu tải về

Link URL