PIC16F876ATISLASHML datasheet(18/234 Pages) MICROCHIP

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PIC16F87XA

DS39582B-page 16

 2003 Microchip Technology Inc.

2.2

Data Memory Organization

The data memory is partitioned into multiple banks

which contain the General Purpose Registers and the

Special Function Registers. Bits RP1 (Status<6>) and

RP0 (Status<5>) are the bank select bits.

Each bank extends up to 7Fh (128 bytes). The lower

locations of each bank are reserved for the Special

Function Registers. Above the Special Function Regis-

ters are General Purpose Registers, implemented as

static RAM. All implemented banks contain Special

Function Registers. Some frequently used Special

Function Registers from one bank may be mirrored in

another bank for code reduction and quicker access.

2.2.1

GENERAL PURPOSE REGISTER

FILE

The register file can be accessed either directly, or

indirectly, through the File Select Register (FSR).

RP1:RP0

Bank

Note:

The EEPROM data memory description can

be found in Section 3.0 “Data EEPROM

and Flash Program Memory” of this data

sheet.

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