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CLC427 bảng dữ liệu(PDF) 5 Page - National Semiconductor (TI) |
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CLC427 bảng dữ liệu(HTML) 5 Page - National Semiconductor (TI) |
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5 / 8 page ![]() 5 http://www.national.com Load Termination Since the CLC427 design has been optimized for Single Supply Operation, it is more capable of sourcing rather than sinking current. For optimum performance, the load should be tied to VEE. When the load is tied to VEE, the output always sources current. Output Overdrive Recovery When the output range of an amplifier is exceeded, time is required for the amplifier to recover from this over driven condition. Figure 5 illustrates the overload recovery of the CLC427 when the output is overdriven. An input was applied in an attempt to drive the output to twice the supply rails, VCC - VEE = 10V, but the output limits. An inverting gain topology was used, see Figure 2. As indicated, the CLC427 recovers within 25ns on the rising edge and within 10ns on the falling edge. Figure 5: Overdrive Recovery Channel Matching Channel matching and crosstalk rejection are largely dependent on board layout. The layout of Comlinear’s dual amplifier evaluation boards are designed to produce optimum channel matching and isolation. Channel matching for the CLC427 is shown in Figure 6. Figure 6: Channel Matching The CLC427’s channel-to-channel isolation is better than -70dB for video frequencies of 4MHz. Input referred crosstalk vs frequency is illustrated in Figure 7. Pulsed crosstalk is shown in Figure 8. Figure 7: Input Referred Crosstalk vs. Frequency Figure 8: Pulsed crosstalk Driving Cables and Capacitive Loads When driving cables, double termination is used to prevent reflections. For capacitive load applications, a small series resistor at the output of the CLC427 will improve stability. The Frequency Response vs. Capacitive Load plot, in the typical performance section, gives the recommended series resistance value for optimum flatness at various capacitive loads. Power Dissipation The power dissipation of an amplifier can be described in two conditions: • Quiescent Power Dissipation - PQ (No Load Condition) • Total Power Dissipation - PT (with Load Condition) The following steps can be taken to determine the power consumption for each CLC427 amplifier: 1. Determine the quiescent power PQ = ICC (VCC – VEE) 2. Determine the RMS power at the output stage PO = (VCC – Vload) (Iload) 3. Determine the total RMS power PT = PQ + PO Add the total RMS powers for both channels to determine the power dissipated by the dual. Time (50ns/div) Input Output Frequency (MHz) Channel A Channel B Vout = 0.25Vpp 110 Frequency (MHz) 1 10 100 -100 -90 -80 -70 -60 -50 -40 Time (50ns/div) Channel A Channel B |
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