RAN [3:0]

Range (˚C)

0011

4

0100

5

0101

6.67

0110

8

0111

10

1000

13.33

1001

16

1010

20

1011

26.67

1100

32

1101

40

1110

53.33

1111

80

This register becomes Read Only when the Ready/Lock/Start/Override register Lock bit is set. Any further attempts to write to this

register shall have no effect. After power up the default value is used whenever the Ready/Lock/Start/Override register Start bit

is cleared even though modifications to this register are possible.

4.16 Registers 62, 63h: Min/Off, Spike Smoothing

Register

Address

Read/

Write

Register

Name

Bit 7

(MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

(LSB)

Default

Value

Lock?

62h

R/W

Min/Off, Zone1 Spike Smoothing OFF3

OFF2

OFF1

RES

ZN1E ZN1-2 ZN1-1 ZN1-0 00h

U

63h

R/W

Zone2, Zone3 Spike Smoothing

ZN2E

ZN2-2 ZN2-1 ZN2-0 ZN3E ZN3-2 ZN3-1 ZN3-0 00h

U

The Off/Min Bits [7:5] specify whether the duty cycle will be 0% or Minimum Fan Duty when the measured temperature falls below

the Temperature LIMIT register setting (see table below). OFF1 applies to fan 1, OFF2 applies to fan 2, and OFF3 applies to fan

3.

If the Remote1 or Remote2 pins are connected to a processor or chipset, instantaneous temperature spikes may be sampled by

the LM85. If these spikes are not ignored, the CPU fan (if connected to LM85) may turn on prematurely and produce unpleasant

noise. For this reason, any zone that is connected to a chipset or processor should have spike smoothing enabled.

When spike smoothing is enabled, the temperature reading registers will still reflect the current value of the temperature — not

the ‘smoothed out’ value.

ZN1E, ZN2E, and ZN3E enable temperature smoothing for zones 1, 2, and 3 respectively.

ZN1-2, ZN1-1, and ZN1-0 control smoothing time for Zone 1.

ZN2-2, ZN2-1, and ZN2-0 control smoothing time for Zone 2.

ZN3-2, ZN3-1, and ZN3-0 control smoothing time for Zone 3.

These registers become ready only when the Ready/Lock/Start/Override register Lock bit is set. Any further attempts to write to

these registers shall have no effect.

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