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MCP8024 bảng dữ liệu(PDF) 17 Page - Microchip Technology

tên linh kiện MCP8024
Giải thích chi tiết về linh kiện  Internal Bandgap Reference
PDF  46 Pages
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nhà sản xuất  MICROCHIP [Microchip Technology]
Trang chủ  http://www.microchip.com
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 2013 Microchip Technology Inc.
DS20005228A-page 17
MCP8024
3.15
LA, LB, LC
Low-side N-channel MOSFET drive signal. Connect to
the gate of the external MOSFETs. A low-impedance
resistor may be used between these pins and the
MOSFET gates to limit current and slew rate.
3.16
HA, HB, HC
High-side N-channel MOSFET drive signal. Connect to
the gate of the external MOSFETs. A low-impedance
resistor may be used between these pins and the
MOSFET gates to limit current and slew rate.
3.17
PHA, PHB, PHC
Phase signals from motor. Provides high-side N-
channel MOSFET driver reference and Back EMF
sense input. The phase signals are also used with the
bootstrap capacitors to provide high-side gate drive via
the VBx inputs.
3.18
VBA, VBB, VBC
High-side MOSFET driver bias. Connect these pins
between the bootstrap charge pump diode cathode and
bootstrap charge pump capacitor. The 12V LDO output
is used to provide 12V at the diode anodes. The phase
signals are connected to the other side of the bootstrap
charge pump capacitors.
3.19
DE2
Open-drain
communications
node.
The
DE2
communications is a half-duplex 9600 baud, 8-bit, no
parity communications link. The open-drain DE2 pin
must be pulled high by an external pull-up resistor.
3.20
HV_IN1, HV_IN2,
LV_OUT1,LV_OUT2
Unidirectional digital level translators. Translates digital
input signal on the HV_INx pin to a low-level digital out-
put signal on the LV_OUTx pin. The HV_INx pins have
internal 30K
 pullups to VDD that are controlled by
Configuration register 0 bit 6. The Configuration regis-
ter 0 bit 6 is only sampled during CE = 0. The HV_IN1
pin has higher ESD protection than the HV_IN2 pin.
The higher ESD protection makes the HV_IN1 pin bet-
ter suited for connection to external switches.
LV_OUT1 and LV_OUT2 are open-drain outputs. An
external pull-up resistor to the low-voltage logic supply
is required.



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