ADC12L034CIWM datasheet(27/36 Pages) NSC

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Application Hints (Continued)

2.1 Biasing for Various Multiplexer Configurations

Figure 11 is an example of biasing the device for

single-ended operation. The sign bit is always low. The digi-

tal output range is 0 0000 0000 0000 to 0 1111 1111 1111.

One LSB is equal to 610 µV (2.5V/4096 LSBs).

For pseudo-differential signed operation the biasing circuit

shown in

Figure 12 shows a signal AC coupled to the ADC.

This gives a digital output range of −4096 to +4095. With a

1.25V reference, as shown, 1 LSB is equal to 305 µV. Al-

though the ADC is not production tested with a 1.25V refer-

ence linearity error typically will not change more than 0.3

LSB. With the ADC set to an acquisition time of 10 clock pe-

riods the input biasing resistor needs to be 600

Ω or less. No-

tice though that the input coupling capacitor needs to be

made fairly large to bring down the high pass corner. In-

creasing the acquisition time to 34 clock periods (with a

5 MHz CCLK frequency) would allow the 600

Ω to increase to

6k, which with a 1 µF coupling capacitor would set the high

pass corner at 26 Hz. The value of R1 will depend on the

value of R2.

An alternative method for biasing pseudo-differential opera-

tion is to use the +1.25V from the LM4040 to bias any ampli-

fier circuits driving the ADC as shown in

Figure 13. The value

of the resistor pull-up biasing the LM4040-2.5 will depend

upon the current required by the op amp biasing circuitry.

Fully differential operation is shown in

Figure 14. One LSB

for this case is equal to (2.5V/4096) = 610 mV.

Differential

Configuration

DS011830-40

A/DIN1 and A/DIN2 can be assigned as the + or − input

Single-Ended

Configuration

DS011830-41

A/DIN1 is + input

A/DIN2 is − input

FIGURE 10.

DS011830-46

FIGURE 11. Single-Ended Biasing

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