ADC12L063 datasheet(3/22 Pages) NSC

3 / 22 page

Pin Descriptions and Equivalent Circuits

Pin No.

Symbol

Equivalent Circuit

Description

ANALOG I/O

IN+

Non-Inverting analog signal Input. With a 1.0V reference

voltage the input signal level is 1.0 V

P-P.

IN−

Inverting analog signal Input. With a 1.0V reference voltage

the input signal level is 1.0 V

P-P. This pin may be connected

to V

CM for single-ended operation, but a differential input

signal is required for best performance.

REF

Reference input. This pin should be bypassed to AGND with

a 0.1 µF monolithic capacitor. V

REF is 1.0V nominal and

should be between 0.8V and 1.2V.

These pins are high impedance reference bypass pins only.

Connect a 0.1 µF capacitor from each of these pins to AGND.

DO NOT connect anything else to these pins.

DIGITAL I/O

CLK

Digital clock input. The range of frequencies for this input is 1

MHz to 70 MHz (typical) with guaranteed performance at 62

MHz. The input is sampled on the rising edge of this input.

OE is the output enable pin that, when low, enables the

TRI-STATE data output pins. When this pin is high, the

outputs are in a high impedance state.

8PD

PD is the Power Down input pin. When high, this input puts

the converter into the power down mode. When this pin is

low, the converter is in the active mode.

ADC12L063 bảng dữ liệu(PDF) 3 Page - National Semiconductor (TI)