ADC12D040EVAL datasheet(5/22 Pages) NSC

5 / 22 page

Pin Descriptions and Equivalent Circuits (Continued)

Pin No.

Symbol

Equivalent Circuit

Description

24–29

34–39

DA0–DA11

Digital data output pins that make up the 12-bit conversion

results of their respective converters. DA0 and DB0 are the

LSBs, while DA11 and DB11 are the MSBs of the output

word. Output levels are TTL/CMOS compatible.

42–47

52–57

DB0–DB11

ANALOG POWER

9, 18, 19,

62, 63

Positive analog supply pins. These pins should be connected

to a quiet +5V source and bypassed to AGND with 0.1 µF

monolithic capacitors located within 1 cm of these power pins,

and with a 10 µF capacitor.

3, 8, 10,

17, 20, 61,

AGND

The ground return for the analog supply.

DIGITAL POWER

33, 48

Positive digital supply pin. This pin should be connected to

the same quiet +5V source as is V

A and be bypassed to

DGND with a 0.1 µF monolithic capacitor located within 1 cm

of the power pin and with a 10 µF capacitor.

32, 49

DGND

The ground return for the digital supply.

30, 51

Positive digital supply pins for the ADC12D040’s output

drivers. These pins should be connected to a voltage source

of +2.5V to +5V and bypassed to DR GND with a 0.1 µF

monolithic capacitor. If the supply for these pins are different

from the supply used for V

A and VD, they should also be

bypassed with a 10 µF tantalum capacitor. V

DR should never

exceed the voltage on V

D. All bypass capacitors should be

located within 1 cm of the supply pin.

23, 31, 40,

50, 58

DR GND

The ground return for the digital supply for the ADC12D040’s

output drivers. These pins should be connected to the system

digital ground, but not be connected in close proximity to the

ADC12D040’s DGND or AGND pins. See Section 5 (Layout

and Grounding) for more details.

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