PI3HDMI301ZLE datasheet(4/16 Pages) PERICOM

4 / 16 page

PS8959B

10/01/09

PI3HDMI301

3:1 Active Switch for HDMI™ Signals with

Optimized Equalization for Enhanced Signal Integrity

ADVANCE INFORMATION - COMPANY CONFIDENTIAL

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Pin Description

80 LQFP Pin #

64 TQFN Pin #

Pin Name

I/O

Description

9, 12, 15, 6

7, 9,12, 4

D0+1, D1+1, D2+1, CLK+1

Port 1 TMDS Positive inputs

71, 74, 77, 68

57, 59, 62, 54

D0+2, D1+2, D2+2, CLK+2

Port 2 TMDS Positive inputs

52, 55, 58, 49

43, 45, 48, 40

D0+3, D1+3, D2+3, CLK+3

Port 3 TMDS Positive inputs

8, 11, 14, 5

6, 8, 11, 3

D0-1, D1-1, D2-1, CLK-1

Port 1 TMDS Negative inputs

70, 73, 76, 67

56, 58, 61, 53

D0-2, D1-2, D2-2, CLK-2

Port 2 TMDS Negative inputs

51, 54, 57, 48

42, 44, 47, 39

D0-3, D1-3, D2-3, CLK-3

Port 3 TMDS Negative inputs

4, 10, 16, 24, 30,

36, 37, 47, 53, 59,

65, 66, 72, 78

GND

Ground

HPD1

Port 1 HPD output

HPD2

Port 2 HPD output

HPD3

Port 3 HPD output

HPD_Sink

Sink side hot plug detector input. High: 5-V

power signal asserted from source to sink

and EDID is ready.

Low: No 5-V power signal asserted from

source to sink, or EDID is not ready.

Output Enable, Active LOW

SCL1

I/O

Port 1 DDC Clock

SCL2

I/O

Port 2 DDC Clock

SCL3

I/O

Port 3 DDC Clock

SCL_Sink

I/O

Sink Side DDC Clock

SDA1

I/O

Port 1 DDC Data

SDA2

I/O

Port 2 DDC Data

SDA3

I/O

Port 3 DDC Data

SDA_Sink

I/O

Sink Side DDC Data

21, 22, 23

17, 18, 19

S1, S2, S3

Source Input Control

7, 13, 17, 27, 33,

43, 50, 56, 61, 69,

75, 79

5, 10, 22, 27, 35,

41, 46, 55, 60

VDD

3.3V Power Supply

31, 28, 25, 34

25, 23, 20, 28

D0+, D1+, D2+, CLK+

TMDS positive outputs

32, 29, 26, 35

26, 24, 21, 29

D0-, D1-, D2-, CLK-

TMDS negative outputs

41, 60

33, 49

EQ_S0, EQ_S1

Equalizer controls, both controls have

internal pull-ups

19, 18, 20, 1

15, 14, 16, 64

OC_S0, OC_S1,

OC_S2, OC_S3

Output buffer controls, all control bits have

internal pull-ups

09-0054

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