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ADC10321 bảng dữ liệu(PDF) 14 Page - National Semiconductor (TI) |
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ADC10321 bảng dữ liệu(HTML) 14 Page - National Semiconductor (TI) |
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14 / 16 page ![]() Applications Information (Continued) ponent (e.g., a filter capacitor) connected between the con- verter’s input and ground should be connected to a very clean point in the analog ground return. Figure 7 gives an example of a suitable layout, including power supply routing, ground plane separation, and bypass capacitor placement. All analog circuitry (input amplifiers, fil- ters, reference components, etc.) should be placed on or over the analog ground plane. All digital circuitry and I/O lines should be over the digital ground plane. Digital and analog signal lines should never run parallel to each other in close proximity with each other. They should only cross each other when absolutely necessary, and then only at 90˚ angles. Violating this rule can result in digital noise getting into the input, which degrades accuracy and dynamic performance (THD, SNR, SINAD). DS100897-21 FIGURE 7. An acceptable layout pattern www.national.com 14 |
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