ADC0844 datasheet(4/20 Pages) NSC

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Electrical Characteristics (Continued)

The following specifications apply for V

CC = 5VDC unless otherwise specified.Boldface limits apply from TMIN to TMAX; all

other limits T

A = Tj = 25˚C.

Parameter

Conditions

ADC0844BCJ

ADC0844CCJ

ADC0844CCN

ADC0848BCN, ADC0848CCN

ADC0848BCV, ADC0848CCV

Limit

Units

Typ

Tested

Design

Typ

Tested

Design

(Note 5)

Limit

(Note 5)

Limit

(Note 6)

(Note 7)

(Note 6)

(Note 7)

DIGITAL AND DC CHARACTERISTICS

VOUT(0), Logical “0”

VCC=4.75V

0.4

0.34

0.4

Output Voltage (Max)

IOUT=1.6 mA

IOUT, TRI-STATE Output

VOUT=0V

−0.01

−3

−0.01

−0.3

−3

µA

Current (Max)

VOUT=5V

0.01

0.3

µA

ISOURCE, Output Source

VOUT=0V

−14

−6.5

−14

−7.5

−6.5

Current (Min)

ISINK, Output Sink

VOUT=VCC

8.0

9.0

8.0

Current (Min)

ICC, Supply Current (Max)

CS =1, VREF

Open

2.5

2.3

2.5

AC Electrical Characteristics

The following specifications apply for V

CC = 5VDC,tr = tf = 10 ns unless otherwise specified. Boldface limits apply from TMIN

to T

MAX; all other limits TA = Tj = 25˚C.

Tested

Design

Parameter

Conditions

Typ

Limit

Units

(Note 5)

(Note 6)

(Note 7)

C, Maximum Conversion Time (See Graph)

µs

W(WR), Minimum WR Pulse Width

(Note 11)

150

ACC, Maximum Access Time (Delay from Falling Edge of

L = 100 pF

145

225

RD to Output Data Valid)

(Note 11)

1H,t0H, TRI-STATE Control (Maximum Delay from Rising

L = 10 pF, RL = 10k

125

200

Edge of RD to Hi-Z State)

(Note 11)

WI,tRI, Maximum Delay from Falling Edge of WR or RD to

(Note 11)

200

400

Reset of INTR

DS, Minimum Data Set-Up Time

(Note 11)

100

DH, Minimum Data Hold Time

(Note 11)

IN, Capacitance of Logic Inputs

OUT, Capacitance of Logic Outputs

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating

the device beyond its specified operating conditions.

Note 2: All voltages are measured with respect to the ground pins.

Note 3: When the input voltage (VIN) at any pin exceeds the power supply rails (VIN < V

−or V

IN > V

+) the absolute value of the current at that pin should be limited

to 5 mA or less. The 20 mA package input current limits the number of pins that can exceed the power supply boundaries witha5mA current limit to four.

Note 4: Human body model, 100 pF discharged through a 1.5 k

Ω resistor.

Note 5: Typicals are at 25˚C and represent most likely parametric norm.

Note 6: Tested limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).

Note 7: Design limits are guaranteed by not 100% tested. These limits are not used to calculate outgoing quality levels.

Note 8: Total unadjusted error includes offset, full-scale, linearity, and multiplexer error.

Note 9: For VIN (−) ≥ VIN(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input, which will forward-conduct for analog input

voltages one diode drop below ground or one diode drop greater than VCC supply. Be careful during testing at low VCC levels (4.5V), as high level analog inputs (5V)

can cause this input diode to conduct, especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias

of either diode. This means that as long as the analog VIN does not exceed the supply voltage by more than 50 mV, the output code will be correct. To achieve an

absolute 0 VDC to5VDC input voltage range will therefore require a minimum supply voltage of 4.950 VDC over temperature variations, initial tolerance and loading.

Note 10: Off channel leakage current is measured after the channel selection.

Note 11: The temperature coefficient is 0.3%/˚C.

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