2

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P-0.1

02/29/12

PI6C49015

Embedded Clock Generator

Pin Description

Pin # Pin Name

Pin Type

Pin Description

1

IREF

Output

Connect to 475-Ohm resistor to set HCSL output drive current

2

100M_Q4-

Output

100MHz HCSL output

3

100M_Q4+

Output

100MHz HCSL output

4

100M_Q3-

Output

100MHz HCSL output

5

100M_Q3+

Output

100MHz HCSL output

6

SCLK

Input

SMBus compatible input clock. Supports fast mode 400 kHz input clock

7

SDATA

I/O

SMBus compatible data line

8

GND_25M

Power

Ground for 25MHz output

9

25M_OUT1

Output

25MHz LVCMOS output. When disabled, output is trisated and has a normal

110kOhm pull-down

10

25M_OUT2

Output

25MHz LVCMOS output. When disabled, output is trisated and has a normal

110kOhm pull-down

11

VDD_25M

Power

3.3V supply for 25MHz output

12

GND_XTAL

Power

Ground for XTAL

13

PDRESET

Input

Power on reset, when low all PLLs are powered down and output trisated. SMBus

registers are reset to default values

14

X1

Input

Crystal input. Integrated 6pf capacitance

15

X2

Output

Crystal output. Integrated 6pf capacitance

16

VDD_XTAL

Power

3.3V supply for XTAL

17

100M_Q2-

Output

100MHz HCSL output

18

100M_Q2+

Output

100MHz HCSL output

19

GNDO_100M

Output

Ground for 100MHz output buffer

20

VDDO_100M

Power

3.3V supply for 100MHz output buffer

21

VDDO_100M

Power

3.3V supply for 100MHz output buffer

22

GNDA

Power

Ground for 100MHz related PLL

23

VDDA

Power

3.3V supply for 100MHz related PLL

24

100M_Q1-

Output

100MHz HCSL output

25

100M_Q1+

Output

100MHz HCSL output

26

100M_Q0+

Output

100MHz HCSL output

27

100M_Q0-

Output

100MHz HCSL output

28

GNDO_100M

Power

Ground for 100MHz output buffer

12-0168