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SP3508CF bảng dữ liệu(PDF) 26 Page - Sipex Corporation |
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SP3508CF bảng dữ liệu(HTML) 26 Page - Sipex Corporation |
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26 / 33 page ![]() 26 Date: 06/14/04 SP3508 Enhanced WAN Multi–Mode Serial Transceiver © Copyright 2004 Sipex Corporation VCC = +3V +6V VSS1 Storage Capacitor VDD Storage Capacitor C1 C2 + + ++ – – – – CVDD CVSS1 Figure 48. Charge Pump - Phase 4. 2-phased inverter pump Phase 1 Please refer to figure below: In the first phase of the clock cycle, switches S2 and S4 are opened and S1 and S3 closed. This connects the flying capacitor, C3, from Vin to ground. C3 charge up to the input voltage applied at Vcc. Phase 2 In the second phase of the clock cycle, switches S2 and S4 are closed and S1 and S3 are opened. This connects the flying capacitor, C3, in parallel with the output capacitor, CVSS2. The Charge stored in C3 is now transferred to CVSS2. Simultaneously, the negative side of CVSS2 is connected to VSS2 and the positive side is connected to ground. With the voltage across CVSS2 smaller than the voltage across C3, the charge flows from C3 to CVSS2 until the voltage at the VSS2 equals -VCC. C3 S2 S1 S3 S4 VSS2 CVSS2 + + VCC VSS2 = -VCC Figure 49. Circuit for an Ideal Voltage Inverter. FEATURES |
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