SP6830 datasheet(13/16 Pages) SIPEX

13 / 16 page

Rev. 9-22-00

SP6830/6831 Low Power Voltage Inverters With Shutdown

Figure 22. Protection for Heavy Loads

When loading the SP6830/6831 devices from IN

to OUT, the input current remains constant

(disregarding any spikes due to internal

switching).

Implementing a 0.1

µF bypass

capacitor should be sufficient.

When loading the SP6830/6831 devices from

OUT to GND, the current from the supply will

switch from twice that of I

OUT and zero amperes.

Designers should implement a large bypass

capacitor (C3 = C1) if the supply has a high AC

impedance.

Voltage Inverter

A designer can find the most common application

for the SP6830/6831 devices in Figure 17 as a

voltage inverter. The only external components

needed are 3 capacitors: the flying capacitor, C1,

the output capacitor, C2, and the bypass capacitor,

C3 (if necessary). This circuit is used to obtain

the Typical Performance Characteristics found

in Figures 2 to 16 (unless otherwise noted).

Connecting in Parallel

A designer can parallel a number of SP6830/

6831 devices to reduce the output resistance for

specific designs. All devices will need their own

flying capacitor, C1, but a single output capacitor

will serve all of the devices connected in parallel

by increasing the capacitance of C2 by a factor of

n where n equals the total number of devices

connected. This connection can be found in

Figure 20.

Cascading Devices

A designer can cascade SP6830/6831 devices to

produce a larger inverted voltage output. Refer

to Figure 21 for this circuit connection. With

two cascaded devices, the unloaded output

voltage is decreased by the output resistance of

the first device multiplied by the quiescent current

of the second device connected. The total output

resistance is greatly increased when more than

two devices are cascaded.

Driving Excessive Loads

The output should never be pulled above ground.

A designer should implement a Schottky diode

(1N5817) from OUT to GND when driving

heavy loads where a higher supply is sourcing

current into OUT. Refer to Figure 22 for this

circuit connection.

Combining a Doubler and Inverter Circuit

A designer can connect a SP6830/6831 device in

a combination doubler/inverter circuit as seen in

Figure 23. The doubler uses C3 and C4 while the

inverter uses capacitors C1 and C2. Loading

either output decreases both output voltages to

GND because both the doubler and the inverter

circuits use the charge pump. Designers should

not allow the total current output from the doubler

and the inverter to exceed 40mA.

Implementing Shutdown

The SP6830/6831 devices are enabled when the

SHDN input pin is driven HIGH and disabled

when driven LOW. This input must be tied to V

or GND to minimize any noise effects due to the

internal switching of these devices. The SHDN

input cannot be driven 0.5V above V

IN without

the possibility of introducing significant current

flows.

Layout and Grounding

Designers should make an effort to minimize

noise by paying special attention to the circuit

layout with the SP6830/6831 devices. External

components should be connected in close

proximity to the device and a ground plane

should be implemented. This will keep electrical

traces short minimizing parasitic inductance and

capacitance.

SP6830

SP6831

GND

OUT

1N5817

SP6830 bảng dữ liệu(PDF) 13 Page - Sipex Corporation

SP6830 bảng dữ liệu(HTML) 13 Page - Sipex Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

bảng dữ liệu tải về

Link URL