SP6121EB datasheet(4/6 Pages) SIPEX

4 / 6 page

Rev 7/25/01

respectively), and the current set resistor (R2), are discussed in detail in the SP6121

data sheet.

USING THE DEMO BOARD

To use the Demo Board, connect the input voltage, VIN to pins 7 and 8 and a ground,

GND, to pins 5 and 6. Connect the load to pins 1, 2, 3, and 4. Pin 9 provides a logic

level “power good” signal and Pin 10 is used for trimming the output voltage.

When measuring efficiency, care must be taken to keep leads between measuring

devices, the power supply (VIN) and the demo board as short as possible and the

measurement probes should be connected to pins 4 (VOUT) and 7 (VIN).

The SP708 power management controller IC (U2) on the demo board is used to

generate a Power Good signal. On this demo board, when the voltage on the pin 6 (PFI)

of U2 is 1.25V or less, U2’s pin 7 (PFO) goes LOW. Pin 6 can be connected directly, or

through a resistor divider, to VOUT or VIN.

DEMO BOARD CHARACTERISTICS

FIGURE 4. EFFICIENCY vs. I load. Vout=2,5V

FIGURE 5. Line Regulation. Vout=2.5V

-0.14

-0.12

-0.1

-0.08

-0.06

-0.04

-0.02

0.02

Vin (V)

I load=5.0A

I load=3.0A

456789

I load (A)

C6=47uF, 3.3/2.5V

C6=47uF,5.0/1.9V

C6=330uF,3.3/2.5V

C6=330uF,5.0/1.9V

SP6121EB bảng dữ liệu(PDF) 4 Page - Sipex Corporation