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ADG5243F bảng dữ liệu(PDF) 13 Page - Analog Devices

tên linh kiện ADG5243F
Giải thích chi tiết về linh kiện  User Defined Fault Protection and Detection, 0.8 pc QINJ, Triple SPDT
PDF  30 Pages
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ADG5243F bảng dữ liệu(HTML) 13 Page - Analog Devices

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Data Sheet
ADG5243F
Rev. 0 | Page 13 of 30
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
IN2/F2
S1A
D1
D2
S2B
S1B
IN1/F1
EN/F0
GND
VDD
D3
S3B
VSS
SF
NEGFV
S2A
FF
POSFV
S3A
IN3
ADG5243F
TOP VIEW
(Not to Scale)
Figure 2. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
IN1/F1
Logic Control Input (IN1) (See Table 8.)
Decoder Pin (F1). This pin is used together with the specific fault pin (SF) to indicate which input is in a fault
condition (see Table 9).
2
IN2/F2
Logic Control Input (IN2) (See Table 8).
Decoder Pin (F2). This pin is used together with the specific fault pin (SF) to indicate which input is in a fault
condition (see Table 9).
3
S1A
Overvoltage Protected Source Terminal 1A. This pin can be an input or an output.
4
D1
Drain Terminal 1. This pin can be an input or an output.
5
S1B
Overvoltage Protected Source Terminal 1B. This pin can be an input or an output.
6
S2B
Overvoltage Protected Source Terminal 2B. This pin can be an input or an output.
7
D2
Drain Terminal 2. This pin can be an input or an output.
8
S2A
Overvoltage Protected Source Terminal 2A. This pin can be an input or an output.
9
NEGFV
Negative Fault Voltage. This pin is the negative supply voltage that determines the overvoltage protection level. If
a secondary supply is not used, connect this pin to VSS.
10
SF
Specific Fault Digital Output. This pin has a high output when the device is in normal operation or a low output
when a fault condition is detected on a specific pin, depending on the state of F0, F1, and F2 as shown in Table 9.
The SF pin has a weak internal pull-up resistor, nominally 3 V output.
11
FF
Fault Flag Digital Output. This pin has a high output when the device is in normal operation, or a low output when
a fault condition occurs on any of the Sx inputs. The FF pin has a weak internal pull-up resistor that allows multiple
signals to be combined into a single interrupt for larger modules that contain multiple devices.
12
POSFV
Positive Fault Voltage. This pin is the positive supply voltage that determines the overvoltage protection level. If a
secondary supply is not used, connect this pin to VDD.
13
S3A
Overvoltage Protected Source Terminal 3A. This pin can be an input or an output.
14
D3
Drain Terminal 3. This pin can be an input or an output.
15
S3B
Overvoltage Protected Source Terminal 3B. This pin can be an input or an output.
16
VSS
Most Negative Power Supply Potential.
17
VDD
Most Positive Power Supply Potential.
18
GND
Ground (0 V) Reference.
19
EN/F0
Active Low Digital Input. When this pin is high, the device is disabled and all switches are off. When this pin is low,
the INx logic inputs determine the on switches.
Decoder Pin (F0). This pin is used together with the specific fault pin (SF) to indicate which input is in a fault
condition (see Table 9).
20
IN3
Logic Control Input (See Table 8).



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