AD8284WCSVZ datasheet(5/28 Pages) AD

5 / 28 page

Data Sheet

AD8284

Rev. D | Page 5 of 28

DIGITAL SPECIFICATIONS

AVDD18x = 1.8 V, AVDD33x = 3.3 V, DVDD18x = 1.8 V, DVDD33x = 3.3 V, 1.00 V internal ADC reference, fIN = 2.5 MHz, fS = 60 MSPS,

RS = 50 Ω, LNA + PGA gain = 35 dB, LPF cutoff = fSAMPLECH/4, 12-bit operation, temperature = −40°C to +105°C, all specifications

guaranteed by testing, unless otherwise noted.

Table 3.

Parameter1

Temperature

Min

Typ

Max

Unit

CLOCK INPUTS (CLK+, CLK−)2

Logic Compliance

CMOS/LVDS/LVPECL

Differential Input Voltage3

Full

250

mV p-p

Input Common-Mode Voltage

Full

1.2

Input Resistance (Differential)

25°C

kΩ

Input Capacitance

25°C

1.5

LOGIC INPUTS (PDWN, SCLK, AUX, MUX[0], MUX[1], ZSEL)2

Logic 1 Voltage

Full

1.2

3.6

Logic 0 Voltage

Full

0.3

Input Resistance

25°C

kΩ

Input Capacitance

25°C

0.5

LOGIC INPUT (CS)2

Logic 1 Voltage

Full

1.2

3.6

Logic 0 Voltage

Full

0.3

Input Resistance

25°C

kΩ

Input Capacitance

25°C

0.5

LOGIC INPUT (SDI)2

Logic 1 Voltage

Full

1.2

DVDD33x + 0.3

Logic 0 Voltage

Full

0.3

Input Resistance

25°C

kΩ

Input Capacitance

25°C

LOGIC OUTPUT (SDO)

Logic 1 Voltage (IOH = 800 μA)

Full

3.0

Logic 0 Voltage (IOL = 50 μA)

Full

0.3

LOGIC OUTPUTS (D11 to D0, SFLAG)

Logic 1 Voltage (IOH = 2 mA)

Full

3.0

Logic 0 Voltage (IOL = 2 mA)

Full

0.3

See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and testing methodology.

Guaranteed by design only.

Specified for LVDS and LVPECL only.

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