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IDT71V67802 bảng dữ liệu(PDF) 8 Page - Integrated Device Technology |
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IDT71V67802 bảng dữ liệu(HTML) 8 Page - Integrated Device Technology |
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8 / 22 page  6.42 8 IDT71V67602, IDT71V67802, 256K x 36, 512K x 18, 3.3V Synchronous Commercial and Industrial Temperature Ranges SRAMs with 2.5V I/O, Pipelined Outputs, Single Cycle Deselect 1 2 34 56 7 8 9 10 11 ANC(3) A7 CE BW3 BW2 CS1 BWE ADSC ADV A8 NC BNC A6 CS0 BW4 BW1 CLK GW OE ADSP A9 NC(3) CI/OP3 NC VDDQ VSS VSS VSS VSS VSS VDDQ NC I/OP2 DI/O17 I/O16 VDDQ VDD VSS VSS VSS VDD VDDQ I/O15 I/O14 EI/O19 I/O18 VDDQ VDD VSS VSS VSS VDD VDDQ I/O13 I/O12 FI/O21 I/O20 VDDQ VDD VSS VSS VSS VDD VDDQ I/O11 I/O10 GI/O23 I/O22 VDDQ VDD VSS VSS VSS VDD VDDQ I/O9 I/O8 HVDD(1) NC NC VDD VSS VSS VSS VDD NC NC ZZ(2) JI/O25 I/O24 VDDQ VDD VSS VSS VSS VDD VDDQ I/O7 I/O6 KI/O27 I/O26 VDDQ VDD VSS VSS VSS VDD VDDQ I/O5 I/O4 LI/O29 I/O28 VDDQ VDD VSS VSS VSS VDD VDDQ I/O3 I/O2 MI/O31 I/O30 VDDQ VDD VSS VSS VSS VDD VDDQ I/O1 I/O0 NI/OP4 NC VDDQ VSS NC NC(3) NC VSS VDDQ NC I/OP1 PNC NC(3) A5 A2 DNU(4) A1 DNU(4) A10 A13 A14 A17 R LBO NC(3) A4 A3 DNU(4) A0 DNU(4) A11 A12 A15 A16 5311 tbl 17a 1 23456 789 10 11 ANC(3) A7 CE BW2 NC CS1 BWE ADSC ADV A8 A10 BNC A6 CS0 NC BW1 CLK GW OE ADSP A9 NC(3) CNC NC VDDQ VSS VSS VSS VSS VSS VDDQ NC I/OP1 DNC I/O8 VDDQ VDD VSS VSS VSS VDD VDDQ NC I/O7 ENC I/O9 VDDQ VDD VSS VSS VSS VDD VDDQ NC I/O6 FNC I/O10 VDDQ VDD VSS VSS VSS VDD VDDQ NC I/O5 GNC I/O 11 VDDQ VDD VSS VSS VSS VDD VDDQ NC I/O4 HVDD(1) NC NC VDD VSS VSS VSS VDD NC NC ZZ(2) JI/O12 NC VDDQ VDD VSS VSS VSS VDD VDDQ I/O3 NC KI/O13 NC VDDQ VDD VSS VSS VSS VDD VDDQ I/O2 NC LI/O14 NC VDDQ VDD VSS VSS VSS VDD VDDQ I/O1 NC MI/O15 NC VDDQ VDD VSS VSS VSS VDD VDDQ I/O0 NC NI/OP2 NC VDDQ VSS NC NC(3) NC VSS VDDQ NC NC PNC NC(3) A5 A2 DNU(4) A1 DNU(4) A11 A14 A15 A18 R LBO NC(3) A4 A3 DNU(4) A0 DNU(4) A12 A13 A16 A17 5311 tbl 17b Pin Configuration 512K x 18, 165 fBGA Pin Configuration 256K x 36, 165 fBGA NOTES: 1. H1 can either be directly connected to VDD, or connected to an input voltage ≥ VIH, or left unconnected. 2. H11 can be left unconnected and the device will always remain in active mode. 3. Pin N6, B11, A1, R2 and P2 are reserved for 18M, 36M, 72M, and 144M and 288M respectively. |
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