9

Shown in Figure 7 is an application to monitor and detect power supply over voltage through the use of the PFI pin. When the

voltage at the PFI input, (VTH) exceeds VREF, (1.2 to 1.3V) the PFD output transitions from low to high causing the MR output to

transition from high to low. This asserts a RESET_OD indicating the voltage being monitored has exceeded the over voltage

monitor limit.

Figure 7. UT01VS50D Over Voltage Power Supply Monitoring and Reset

MR

1

2 VDD

PFI

3

7

6

8

WDI

WDO

RESET_OD

R1

R2

GND

4

PFO 5

VDD

I/O

RESET

uP

RPU

RPU=(VDD/IOL)

VTH= (R1+R2)/R2 ) * VPFI

VPFI=1.25V +/- 50mV

VDD 5V