ATMEGA323 datasheet(46/247 Pages) ATMEL

46 / 247 page

ATmega323(L)

1457G–AVR–09/03

Figure 33. Timer/Counter2 Block Diagram

The 8-bit Timer/Counter0 can select clock source from CK, prescaled CK, or an external

pin.

The 8-bit Timer/Counter2 can select clock source from CK, prescaled CK, external

TOSC1 or prescaled external TOSC1.

Both Timers/Counters can be stopped as described in section “Timer/Counter0 Control

page 47.

The various Status Flag s (Ove rflo w and Compare Matc h) are f ound in th e

Timer/Counter Interrupt Flag Register – TIFR (see page 36). Control signals are found in

the Timer/Counter Control Register – TCCR0 and TCCR2. The interrupt enable/disable

settings are found in the Timer/Counter Interrupt Mask Register – TIMSK (see page 34).

When Timer/Counter0 is externally clocked, the external signal is synchronized with the

Oscillator frequency of the CPU. To assure proper sampling of the external clock, the

minimum time between two external clock transitions must be at least one internal CPU

clock period. The external clock signal is sampled on the rising edge of the internal CPU

clock.

The 8-bit Timer/Counters feature both a high-resolution and a high-accuracy usage with

the lower prescaling opportunities. Similarly, the high-prescaling opportunities make the

Timer/Counter0 useful for lower speed functions or exact timing functions with infre-

quent actions.

8-BIT DATA BUS

8-BIT ASYNCH T/C2 DATA BUS

ASYNCH. STATUS

TIMER INT. FLAG

TIMER/COUNTER2

(TCNT2)

SYNCH UNIT

8-BIT COMPARATOR

OUTPUT COMPARE

REGISTER2 (OCR2)

TIMER INT. MASK

T/C CLK SOURCE

UP/DOWN

T/C CLEAR

CONTROL

LOGIC

PCK2

T/C2 OVER-

FLOW IRQ

T/C2 COMPARE

MATCH IRQ

T/C2 CONTROL

TOSC1

SPECIAL FUNCTIONS

IO REGISTER (SFIOR)

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