MAX3053_14 datasheet(4/12 Pages) MAXIM

4 / 12 page

(VCC = +5V ±10%, RL = 60Ω, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and

TA = +25°C.) (Figures 1, 2, and 3)

Note 1: As defined by ISOSHDN, bus value is one of two complementary logical values: dominant or recessive. The dominant value

represents the logical 1 and the recessive represents the logical 0. During the simultaneous transmission of the dominant

and recessive bits, the resulting bus value is dominant. For MAX3053 values, see the truth table in the Transmitter and

Receiver sections.

Note 2: The ESD structures do not short out CANH and CANL under an ESD event while -7V < CANH, CANL < +12V.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Minimum Bit Time

tBIT

VRS = 0 (2Mbps)

0.5

µs

RRS = 24kΩ (500kbps)

RRS = 100kΩ (125kbps)

RRS = 180kΩ (62.5kbps)

Delay TXD to Bus Active

tONTXD

VRS = 0

Delay TXD to Bus Inactive

tOFFTXD

VRS = 0

Delay TXD to Receiver Active

tONRXD

VRS = 0 (2Mbps)

120

RRS = 24kΩ (500kbps)

0.4

µs

RRS = 100kΩ (125kbps)

1.6

RRS = 180kΩ (62.5kbps)

5.0

Delay TXD to Receiver Inactive

tOFFRXD

VRS = 0 (2Mbps)

130

RRS = 24kΩ (500kbps)

0.45

µs

RRS = 100kΩ (125kbps)

1.6

RRS = 180kΩ (62.5kbps)

5.0

Differential Output Slew Rate

|SR|

RRS = 24kΩ (500kbps)

V/µs

RRS = 100kΩ (125kbps)

RRS = 180kΩ (62.5kbps)

1.6

Time to Wakeup: CANH > 9V

tWAKE

SHDN = GND, VTXD = VCC

µs

Time to Sleep Mode when Bus Is

Recessive

tSHDN

CSHDN = 100nF

MAX3053

±80V Fault-Protected, 2Mbps,

Low Supply Current CAN Transceiver

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Timing Characteristics

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