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UT54ACTS193 bảng dữ liệu(PDF) 1 Page - Aeroflex Circuit Technology |
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UT54ACTS193 bảng dữ liệu(HTML) 1 Page - Aeroflex Circuit Technology |
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1 / 10 page ![]() 1 Standard Products UT54ACS193/UT54ACTS193 Synchronous 4-Bit Up-Down Dual Clock Counters Datasheet November 2010 www.aeroflex.com/logic FEATURES Look-ahead circuitry enhances cascaded counters Fully synchronous in count modes Parallel asynchronous load for modulo-N count lengths Asynchronous clear 1.2μ CMOS (ACTS193) and .6μm CRH CMOS process (ACS193) - Latchup immune High speed Low power consumption Single 5 volt supply Available QML Q or V processes Flexible package - 16-pin DIP - 16-lead flatpack UT54ACS193 - SMD 5962-96566 UT54ACTS193 - SMD 5962-96567 DESCRIPTION The UT54ACS193 and the UT54ACTS193 are synchronous 4- bit, binary reversible up-down binary counters. Synchronous operation is provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other when instructed. Synchronous operation eliminates the output counting spikes normally associated with asynchronous counters. The outputs of the four flip-flops are triggered on a low-to-high- level transition of either count input (Up or Down). The direc- tion of the counting is determined by which count input is pulsed while the other count input is high. The counters are fully programmable. The outputs may be preset to either level by placing a low on the load input and entering the desired data at the data inputs. The output will change to agree with the data inputs independently of the count pulses. Asynchronous loading allows the counters to be used as modulo- N dividers by simply modifying the count length with the preset inputs. A clear input has been provided that forces all outputs to the low level when a high level is applied. The clear function is inde- pendent of the count and the load inputs. The counter is designed for efficient cascading without the need for external circuitry. The borrow output (BO) produces a low- level pulse while the count is zero and the down input is low. Similarly, the carry output (CO) produces a low-level pulse while the count is maximum PINOUTS 16-Pin DIP Top View 16-Lead Flatpack Top View FUNCTION TABLE FUNCTION CLOCK UP CLOCK DOWN CLR LOAD Count Up ↑ H L H Count Down H ↑ L H Reset X X H X Load Preset Input X X L L 1 2 3 4 5 7 6 16 15 14 13 12 10 11 B QB QA DOWN UP QC QD VDD A CLR BO CO C 8 9 VSS D LOAD 1 2 3 4 5 7 6 16 15 14 13 12 10 11 VDD 89 B QB QA DOWN UP QC QD A CLR BO CO LOAD C VSS D |
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