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RM41L232 bảng dữ liệu(PDF) 21 Page - Texas Instruments

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RM41L232 bảng dữ liệu(HTML) 21 Page - Texas Instruments

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RM41L232
www.ti.com
SPNS240A – OCTOBER 2014 – REVISED JUNE 2015
5.7
Power Consumption
Over Recommended Operating Conditions
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VCC digital supply current (operating mode)
135(1)
fHCLK = 80 MHz
LBIST clock rate =
VCC digital supply current (LBIST mode)
145(2)(3)
ICC
mA
45 MHz
PBIST ROM clock
VCC digital supply current (PBIST mode)
135 (2)(3)
frequency = 80 MHz
ICCREFHI
ADREFHI supply current (operating mode)
ADREFHImax
3
mA
ICCAD
VCCAD supply current (operating mode)
VCCADmax
ICCIO
VCCIO digital supply current (operating mode)
No DC load, VCCmax
45(4)
mA
ICCP
VCCP pump supply current
Read mode
Read from one bank
ICCP,
and program or
3.3-V supply current
65(4)
mA
ICCIO,ICCAD
erase another,
VCCPmax
(1)
The maximum ICC, value can be derated
•
linearly with voltage
•
by 0.76 mA/MHz for lower operating frequency when fHCLK= fVCLK
•
for lower junction temperature by the equation below where TJK is the junction temperature in Kelvin and the result is in milliamperes.
60 - 0.001 e0.026 T
JK
(2)
The maximum ICC, value can be derated
•
linearly with voltage
•
for lower junction temperature by the equation below where TJK is the junction temperature in Kelvin and the result is in milliamperes.
60 - 0.001 e0.026 T
JK
(3)
LBIST and PBIST currents are for a short duration, typically less than 10 ms. They are usually ignored for thermal calculations for the
device and the voltage regulator
(4)
Maximum current requirement of the three combined supplies
Copyright © 2014–2015, Texas Instruments Incorporated
Specifications
21
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