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SN74LVC00ADBLE bảng dữ liệu(PDF) 9 Page - Texas Instruments |
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SN74LVC00ADBLE bảng dữ liệu(HTML) 9 Page - Texas Instruments |
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9 / 31 page ![]() A B Y 9 SN54LVC00A, SN74LVC00A www.ti.com SCAS279R – JANUARY 1993 – REVISED FEBRUARY 2016 Product Folder Links: SN54LVC00A SN74LVC00A Submit Documentation Feedback Copyright © 1993–2016, Texas Instruments Incorporated 9 Detailed Description 9.1 Overview The maximum sink and source current is 24mA. Inputs can be driven from 1.8-V, 2.5-V, 3.3-V (LVTTL), or 5-V (CMOS) devices. This feature allows the use of this device as translators in a mixed-system environment. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. 9.2 Functional Block Diagram Logic Diagram, Each Gate (Positive Logic) 9.3 Feature Description • Wide operating voltage range – Operates from 1.65 V to 3.6 V • Allows up or down voltage translation – Inputs and outputs accept voltages to 5.5 V • Ioff feature – Allows voltages on the inputs and outputs when VCC is 0 V 9.4 Device Functional Modes Table 1. Function Table (Each Gate) INPUTS OUTPUT Y A B H H L L X H X L H |
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