STM32F745VE datasheet(44/227 Pages) STMICROELECTRONICS

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Functional overview

STM32F745xx STM32F746xx

44/227

DocID027590 Rev 4

This dual digital Interface supports the following features:

•

two DAC converters: one for each output channel

•

8-bit or 12-bit monotonic output

•

left or right data alignment in 12-bit mode

•

synchronized update capability

•

noise-wave generation

•

triangular-wave generation

•

dual DAC channel independent or simultaneous conversions

•

DMA capability for each channel

•

external triggers for conversion

•

input voltage reference VREF+

Eight DAC trigger inputs are used in the device. The DAC channels are triggered through

the timer update outputs that are also connected to different DMA streams.

2.42

Serial wire JTAG debug port (SWJ-DP)

The ARM SWJ-DP interface is embedded, and is a combined JTAG and serial wire debug

port that enables either a serial wire debug or a JTAG probe to be connected to the target.

Debug is performed using 2 pins only instead of 5 required by the JTAG (JTAG pins could

be re-use as GPIO with alternate function): the JTAG TMS and TCK pins are shared with

SWDIO and SWCLK, respectively, and a specific sequence on the TMS pin is used to

switch between JTAG-DP and SW-DP.

2.43

Embedded Trace Macrocell™

The ARM Embedded Trace Macrocell provides a greater visibility of the instruction and data

flow inside the CPU core by streaming compressed data at a very high rate from the

STM32F74xxx through a small number of ETM pins to an external hardware trace port

analyzer (TPA) device. The TPA is connected to a host computer using USB, Ethernet, or

any other high-speed channel. Real-time instruction and data flow activity can be recorded

and then formatted for display on the host computer that runs the debugger software. TPA

hardware is commercially available from common development tool vendors.

The Embedded Trace Macrocell operates with third party debugger software tools.

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