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STM32F401CB bảng dữ liệu(PDF) 99 Page - STMicroelectronics

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STM32F401CB bảng dữ liệu(HTML) 99 Page - STMicroelectronics

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STM32F401xB STM32F401xC
Electrical characteristics
113
Figure 34. SPI timing diagram - slave mode and CPHA = 0
Figure 35. SPI timing diagram - slave mode and CPHA = 1(1)
tv(MO)
Data output valid time
Master mode (after enable edge)
-
3
5
ns
th(MO)
Data output hold time
Master mode (after enable edge)
2
-
-
ns
1. Guaranteed by characterization.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50%
Table 61. SPI dynamic characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit



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