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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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TUSB322I bảng dữ liệu(PDF) 6 Page - Texas Instruments |
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TUSB322I bảng dữ liệu(HTML) 6 Page - Texas Instruments |
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6 / 37 page  TUSB322I SLLSEO5 – OCTOBER 2015 www.ti.com Electrical Characteristics (continued) over operating free-air temperature range (unless otherwise noted) TEST PARAMETER MIN TYP MAX UNIT CONDITIONS I2C - SDA/OUT1, SCL/OUT2 can operate from 1.8 or 3.3 V (±10%) when ADDR pin is low or high. (2) VDD_I2C 1.65 1.8 3.6 V Supply range for I2C (SDA/OUT1, SCL/OUT2) VIH High-level signal voltage 1.05 V VIL Low-level signal voltage 0.4 V VOL Low-level signal output voltage (open drain) IOL = –1.6 mA 0.4 V VBUS_DET IO Pins (Connected to System VBUS signal) VBUS_THR VBUS threshold range 2.95 3.3 3.8 V RVBUS External resistor between VBUS and VBUS_DET pin 891 900 909 K Ω RVBUS_PD Internal pulldown resistance for VBUS_DET 95 K Ω DIR pin (Open Drain IO) VOL Low-level signal output voltage IOL = –1.6 mA 0.4 V VCONN RON On resistance of the VCONN power FET 1.25 Ω VTOL Voltage tolerance on VCONN power FET 5.5 V VPASS Voltage to pass through VCONN power FET 5.5 V VCONN current limit; VCONN is disconnected above this IVCONN 225 300 375 mA value CBULK Bulk capacitance on VCONN; placed on VDD supply 10 200 uF (2) When using 3.3 V for I2C, customer must ensure VDD is above 3.0 V at all times. 6.6 Timing Requirements MIN NOM MAX UNIT I2C (SDA, SCL) tSU:DAT Data setup time 100 ns tHD;DAT Data hold time 10 ns tSU:STA Set-up time, SCL to start condition 0.6 µs tHD:STA Hold time, (repeated) start condition to SCL 0.6 µs tSU:STO Set up time for stop condition 0.6 µs tVD;DAT Data valid time 0.9 µs tVD;ACK Data valid acknowledge time 0.9 µs tBUF Bus free time between a stop and start condition 1.3 µs fSCL SCL clock frequency; I2C mode for local I2C control 400 kHz tr Rise time of both SDA and SCL signals 300 ns tf Fall time of both SDA and SCL signals 300 ns CBUS_100KHZ Total capacitive load for each bus line when operating at ≤ 100 KHz 400 pF CBUS_400KHZ Total capacitive load for each bus line when operating at 400 KHz. 100 pF 6 Submit Documentation Feedback Copyright © 2015, Texas Instruments Incorporated Product Folder Links: TUSB322I |
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