L9959S datasheet(21/43 Pages) STMICROELECTRONICS

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L9959S, L9959T

Application information

4.1

Power stage switching behavior

The L9959 output stages can either be controlled by the pins PWM and DIR or by their

corresponding SPI registers (SPWM and SDIR: see Table 32: Configuration register

(CONFIG_REG)). The SPI bit MUX in the configuration register (CONFIG_REG)

determines this. If the power stages are disabled by /ABE or DIS, this bit is reset and the

pins PWM and DIR control the outputs.

The active free-wheeling, in which the body diode is actively shorted by its associated

Power-MOS, can be disabled by the bit FW in the configuration register. By default, active

free-wheeling is enabled.

The device minimizes electro-magnetic emission by switching the high-side and low-side

drivers in a special sequence. Two cases are distinguished: The PWM-mode, during which

the current direction does not change and the direction switch using the DIR, which changes

the current direction (see Figure 9, Figure 11 and Figure 12).

4.1.1

PWM mode (same current direction)

The PWM input pin switches the high-/low-side output of the half-bridge, which is selected

by the DIR pin. DIR = '0': OUT1 is switched, DIR = '1': OUT2 is switched.

PWM = '0': Switched low-side is on, PWM = '1': Switched high-side is on.

Figure 9. PWM mode current flow

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