ASM330LXH datasheet(42/56 Pages) STMICROELECTRONICS

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ASM330LXH

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DocID027411 Rev 3

6.14

CTRL3_C (12h)

Control register 3 (r/w).

100

200

12.5

100

200

100

200

100

200

101

400

101

400

23.5

101

400

101

400

110

800

110

800

110

800

110

800

111

n.a.

111

n.a.

111

n.a.

111

n.a.

1. Values in the table are indicative and can vary proportionally with the specific ODR value.

Table 46. ODR and BW configuration setting (after LPF2) (continued)

ODR_G [2:0]

BW_G [1:0]

ODR [Hz]

Cutoff [Hz](1)

Table 47. CTRL3_C register

BOOT

BDU

0(1)

1. This bit must be set to ‘0’ for the correct operation of the device.

PP_OD

SIM

IF_ADD_INC

BLE

SW_RESET

Table 48. CTRL3_C register description

BOOT

Reboot memory content. Default value: 0.

(0: normal mode; 1: reboot memory content(1))

BDU

Block Data Update. Default value: 0.

(0: continuous update; 1: output registers not updated until MSB and LSB have

been read)

PP_OD

Push-Pull/Open-Drain selection on INT pad. Default value: 0.

(0: push-pull mode; 1: open drain mode)

SIM

SPI Serial Interface Mode selection. Default value: 0.

(0: 4-wire interface; 1: 3-wire interface).

IF_ADD_INC

serial interface (I2C or SPI). Default value: 1.

(0: disabled; 1: enabled)

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