DLPC200 datasheet(21/52 Pages) TI1

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DLPC200

www.ti.com

DLPS014E – APRIL 2010 – REVISED AUGUST 2014

6.5 I/O Electrical Characteristics

All inputs and outputs are LVCMOS

VIL(V)

VIH(V)

VOH(V)

VOL(V)

I/O TYPE(1)

TEST CONDITIONS

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

Input LVCMOS

VCCIO = 1.8 V

–0.3

0.35 × VCCIO

0.65 × VCCIO

2.25

Input LVCMOS

VCCIO = 2.5 V

–0.3

0.7

1.7

VCCIO + 0.3

Input LVCMOS

VCCIO = 3.3 V

–0.3

0.8

1.7

3.6

Input LVTTL

VCCIO = 3.3 V

–0.3

0.8

1.7

3.6

Output LVCMOS

VCCIO = 1.8 V

VCCIO – 0.45

0.45

Output LVTTL

VCCIO = 3.3 V

2.4

0.45

Output LVCMOS

VCCIO = 3.3 V

VCCIO – 0.2

0.2

Output LVDS

VCCIO = 3.3 V

VCCIO – 0.3

0.3

Output SSTL-18

VCCIO = 1.8 V

1.484

0.398

Class I

Bidirectional SSTL-

VCCIO = 1.8 V

0.844

1.094

1.484

0.398

18 Class I

Bidirectional

VCCIO = 3.3 V

–0.3

0.8

1.7

3.6

VCCIO – 0.2

0.2

LVCMOS

(1)

Cross reference to I/O assignments

6.6 Video Input Pixel Interface Timing Requirements

PARAMETER

TEST CONDITIONS

MIN

MAX

UNIT

ƒpclock

Clock frequency, PORTx_CLK

MHz

tp_wh

Pulse duration, high

45% to 55% reference points (signal)

5.6

tp_wl

Pulse duration, low

45% to 55% reference points (signal)

5.6

tp_su

Setup time, PORTx_D(23–0) valid before PORTx_CLK

See (1)

1.5

tp_h

Hold time, PORTx_D(23–0) valid after PORTx_CLK

See (1)

1.5

tp_su

Setup time, PORTx_VSYNC valid before PORTx_CLK

See (1)

1.5

tp_h

Hold time, PORTx_VSYNC valid after PORTx_CLK

See (1)

1.5

tp_su

Setup time, PORTx_HSYNC valid before PORTx_CLK

See (1)

1.5

tp_h

Hold time, PORTx_HSYNC valid after PORTx_CLK

See (1)

1.5

tp_su

Setup time, PORTx_IVALID valid before PORTx_CLK

See (1)

1.5

tp_h

Hold time, PORTx_IVALID valid after PORTx_CLK

See (1)

1.5

(1)

PCLK may be inverted from that shown in Figure 1. In that case, the same specifications in the table are valid except now referenced to

the falling edge of the clock. If the falling edge of PCLK is used, a USB or SPI command must be sent to tell the DLPC200 to use the

falling edge of PCLK.

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