AD7402 datasheet(13/20 Pages) AD

13 / 20 page

Data Sheet

AD7402

Rev. A | Page 13 of 20

THEORY OF OPERATION

CIRCUIT INFORMATION

The AD7402 isolated Σ-Δ modulator converts an analog input

signal into a high speed (10 MHz maximum), single-bit data

stream; the time average single-bit data from the modulator is

directly proportional to the input signal. Figure 22 shows a

typical application circuit where the AD7402 is used to provide

isolation between the analog input, a current sensing resistor or

shunt, and the digital output, which is then processed by a

digital filter to provide an N-bit word.

ANALOG INPUT

The differential analog input of the AD7402 is implemented

with a switched capacitor circuit. This circuit implements a

second-order modulator stage that digitizes the input signal

into a single-bit output stream. The sample clock (MCLKOUT)

provides the clock signal for the conversion process as well as

the output data framing clock. This clock source is internal on

the AD7402. The analog input signal is continuously sampled

by the modulator and compared to an internal voltage

reference. A digital stream that accurately represents the

analog input over time appears at the output of the converter

(see Figure 23).

A differential signal of 0 V ideally results in a stream of alter-

nating 1s and 0s at the MDAT output pin. This output is high

50% of the time and low 50% of the time. A differential input of

250 mV produces a stream of 1s and 0s that are high 89.06% of

the time. A differential input of −250 mV produces a stream of

1s and 0s that are high 10.94% of the time.

A differential input of 320 mV ideally results in a stream of all

1s. A differential input of −320 mV ideally results in a stream of

all 0s. The absolute full-scale range is ±320 mV and the specified

full-scale performance range is ±250 mV, as shown in Table 10.

Table 10. Analog Input Range

Analog Input

Voltage Input (mV)

Positive Full-Scale Value

+320

Positive Specified Performance Input

+250

Zero

Negative Specified Performance Input

−250

Negative Full-Scale Value

−320

Figure 22. Typical Application Circuit

Figure 23. Analog Input vs. Modulator Output

Σ-Δ

MOD/

ENCODER

NONISOLATED

5V/3.3V

VDD1

VDD2

VIN+

VIN–

GND1

GND2

GND

MDAT

SINC3 FILTER*

AD7402

MCLKOUT

SDAT

SCLK

MCLK

100nF

+400V

–400V

220pF

10Ω

5.1V

RSHUNT

10Ω

DECODER

1nF

10µF

GATED

DRIVE

CIRCUIT

FLOATING

POWER SUPPLY

GATED

DRIVE

CIRCUIT

FLOATING

POWER SUPPLY

MOTOR

*THIS FILTER IS IMPLEMENTED

WITH AN FPGA OR DSP

VDD

MODULATOR OUTPUT

+FS ANALOG INPUT

–FS ANALOG INPUT

ANALOG INPUT

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