Frame1Two-WireMDAWriteAddressByte

Frame2PointerRegisterByte

0

StartBy

Master

ACKBy

ACKBy

Frame3Two-WireMDAReadAddressByte

Frame4DataByteReadRegister

StartBy

Master

ACKBy

ACKBy

Master

(2)

From

1

9

1

9

1

9

1

9

SDA

SCL

0

0

0

R/W

0

0

0

0

0

0

P1

P0

¼

¼

¼

SDA

(Continued)

SCL

(Continued)

SDA

(Continued)

SCL

(Continued)

0

0

0

0

0

0

0

0

0

0

R/W

D7

D6

D5

D4

D3

D2

D1

D0

Frame5DataByteReadRegister

StopBy

Master

ACKBy

Master

(2)

From

1

9

D7

D6

D5

D4

D3

D2

D1

D0

StopBy

Master

Frame6DataByteReadRegister

StopBy

Master

ACKBy

Master

(2)

From

1

9

D7

D6

D5

D4

D3

D2

D1

D0

TMP103

SBOS545B – FEBRUARY 2011 – REVISED JANUARY 2016

www.ti.com

(1)

All TMP103 devices on the bus acknowledge the byte.

(2)

The master must issue an acknowledge for each byte read to read all of the TMP103 devices on the bus.

(3)

Three TMP103 devices used in this case; up to eight devices can be used (see Table 2).

Figure 5. Two-Wire Timing Diagram MDA Read Word Format Using Figure 16 (Typical Application)

8

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