Connection Diagrams

Mode Select-Function Table

Operating Mode

Inputs

Outputs

MR

CP

D

n

Q

n

Reset (Clear)

L

X

X

L

Load ‘1’

H

N

HH

Load ‘0’

H

N

LL

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Logic Diagram

Pin Assignment

for DIP and Flatpak

DS100288-3

Pin Assignment

for LCC

DS100288-4

DS100288-5

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

PrintDate=1998/07/27 PrintTime=08:02:05 44014 ds100288 Rev. No. 1

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