+

¨

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§

-1

1

1

r

1

1

+

2

-

1 +

s

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+

s

2

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(s) =

+

-

+

-

+

-

= -

LMP7701, LMP7702, LMP7704

SNOSAI9I – SEPTEMBER 2005 – REVISED NOVEMBER 2015

www.ti.com

Feature Description (continued)

Figure 41. Isolating Capacitive Load

8.3.2 Input Capacitance

CMOS input stages inherently have low input bias current and higher input referred voltage noise. The LMP770x

enhance this performance by having the low input bias current of only ±200 fA, as well as, a very low input

referred voltage noise of 9 nV/

√Hz. To achieve this a larger input stage has been used. This larger input stage

LMP770x is 25 pF. The input capacitance will interact with other impedances such as gain and feedback

resistors, which are seen on the inputs of the amplifier, to form a pole. This pole will have little or no effect on the

output of the amplifier at low frequencies and DC conditions, but will play a bigger role as the frequency

increases. At higher frequencies, the presence of this pole will decrease phase margin and will also cause gain

peaking. To compensate for the input capacitance, care must be taken in choosing the feedback resistors. In

addition to being selective in picking values for the feedback resistor, a capacitor can be added to the feedback

path to increase stability.

Figure 42. Compensating for Input Capacitance

(1)

This equation is rearranged to find the location of the two poles:

(2)

22

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