ATmega16 datasheet(215/315 Pages) ATMEL

215 / 315 page

215

ATmega16(L)

2466E–AVR–10/02

• ADC9:0: ADC Conversion Result

These bits represent the result from the conversion, as detailed in “ADC Conversion

Result” on page 210.

Special FunctionIO Register –

SFIOR

• Bit 7:5 – ADTS2:0: ADC Auto Trigger Source

If ADATE in ADCSRA is written to one, the value of these bits selects which source will

trigger an ADC conversion. If ADATE is cleared, the ADTS2:0 settings will have no

effect. A conversion will be triggered by the rising edge of the selected interrupt flag.

Note that switching from a trigger source that is cleared to a trigger source that is set,

will generate a positive edge on the trigger signal. If ADEN in ADCSRA is set, this will

start a conversion. Switching to Free Running mode (ADTS[2:0]=0) will not cause a trig-

ger event, even if the ADC Interrupt Flag is set

• Bit 4 – ADHSM: ADC High Speed Mode

Writing this bit to one enables the ADC High Speed mode. This mode enables higher

conversion rate at the expense of higher power consumption.

Bit

765

210

ADTS2

ADTS1

ADTS0

ADHSM

ACME

PUD

PSR2

PSR10

SFIOR

Read/Write

R/W

Initial Value

Table 85. ADC Auto Trigger Source Selections

ADTS2

ADTS1

ADTS0

Trigger Source

Free Running mode

Analog Comparator

External Interrupt Request 0

Timer/Counter0 Compare Match

Timer/Counter0 Overflow

Timer/Counter Compare Match B

Timer/Counter1 Overflow

Timer/Counter1 Capture Event

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