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Z86L0808PSC bảng dữ liệu(PDF) 16 Page - Zilog, Inc. |
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Z86L0808PSC bảng dữ liệu(HTML) 16 Page - Zilog, Inc. |
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16 / 26 page ![]() Z86L04/L08 Z8 8-Bit Cost-Effective Microcontrollers Zilog 16 P R E L I M I N A R Y DS97LVO0901 FUNCTIONAL DESCRIPTION (Continued) Stack Pointer. The Z8 has an 8-bit Stack Pointer (R255) used for the internal stack that resides within the 60 gen- eral-purpose registers. It is set to 00Hex after any reset. General-Purpose Registers (GPR). These registers are undefined after the device is powered up. The registers keep their last value after any reset, as long as the reset occurs in the VCC voltage-specified operating range. Note: Register R254 has been designated as a general-purpose register. But is set to 00Hex after any reset. Counter/Timer. There are two 8-bit programmable counter/timers (T0 and T1), each driven by its 6-bit pro- grammable prescaler. The T1 prescaler is driven by inter- nal or external clock sources. (Figure 14). The 6-bit prescaler divide the input frequency of the clock source by any integer number from 1 to 64. Each prescaler drives its counter, which decrements the value (1 to 256) that has been loaded into the counter. When both counter and prescaler reach the end of count, a timer interrupt re- quest IRQ5 (T1 or IRQ4 (T0) is generated. The counter can be programmed to start, stop, restart to continue, or restart from the initial value. The counters are also programmed to stop upon reaching zero (Single-Pass mode) or to automatically reload the initial value and con- tinue counting (Modulo-N Continuous Mode). The counters, but not the prescaler, are read at any time without disturbing their value or count mode. The clock source for T1 is user-definable and is either the internal mi- croprocessor clock divided by four, or an external signal in- put through Port 3. The Timer Mode register configures the external timer input (P31) as an external clock, a trigger in- put that is retriggerable or non-retriggerable, or used as a gate input for the internal clock. Figure 13. Register Pointer The upper nibble of the register file address provided by the register pointer specifies the active working-register group. r7 r6 r5 r4 R253 (Register Pointer) I/O Ports Specified Working Register Group The lower nibble of the register file address provided by the instruction points to the specified register. r3 r2 r1 r0 Register Group 1 Register Group 0 R15 to R0 Register Group F R15 to R4 R3 to R0 R15 to R0 FF F0 0F 00 1F 10 2F 20 3F 30 4F 40 5F 50 6F 60 7F 70 |
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