Z86L7208FSC datasheet(68/71 Pages) ZILOG

68 / 71 page

Z86C72/C92/L72/L92

IR Microcontroller

Zilog

6-68

P R E L I M I N A R Y

DS97LVO0900

Figure 56. Interrupt Request Register

((0) FAH: Read/Write)

Figure 57. Interrupt Mask Register

((0) FBH: Read/Write)

Figure 58. Flag Register

((0) FCH: Read/Write)

R250 IRQ

Inter Edge

P31

↓ P32 ↓ = 00

P31

↓ P32 ↑ = 01

P31

↑ P32 ↓ = 10

P31

↑↓ P32 ↑↓ = 11

IRQ0 = P32 Input

IRQ1 = P33 Input

IRQ2 = P31 Input

IRQ3 = T16

IRQ4 = T8

Reserved (Must be 0)

Default Setting After Reset = 0000 0000

D7 D6

Reserved (Must be 0)

1 Enables IRQ4-IRQ0

(D0 = IRQ0)

0 Master Interrupt Disable*

1 Master Interrupt Enable

R251 IMR

* Default Setting After Reset

Reserved (Must be 0)

D7 D6 D5 D4 D3 D2 D1 D0

User Flag F1

User Flag F2

Half Carry Flag

Decimal Adjust Flag

Overflow Tag

Sign Flag

Zero Flag

Carry Flag

R252 Flags

Figure 59. Register Pointer

((0) FDH: Read/Write)

Figure 60. Stack Pointer High

((0) FEH: Read/Write)

Figure 61. Stack Pointer Low

((0) FFH: Read/Write)

D7 D6 D5 D4 D3 D2 D1 D0

Expanded Register Bank

Pointer

Working Register

Pointer

R253 RP

Default Setting After

Reset = 0000 0000

D7 D6 D5 D4 D3 D2 D1 D0

Stack Pointer Upper

Byte (SP15-SP8)

R254 SPH

D7 D6 D5 D4 D3 D2 D1 D0

Stack Pointer Lower

Byte (SP7-SP0)

R255 SPL

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