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SM8580 bảng dữ liệu(PDF) 12 Page - Nippon Precision Circuits Inc |
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SM8580 bảng dữ liệu(HTML) 12 Page - Nippon Precision Circuits Inc |
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12 / 23 page ![]() SM8580AM NIPPON PRECISION CIRCUITS—12 Control Registers (All Banks, Register E (bits 2, 3) and F) s TEST bit Factory test bit. This bit should be set to 0. Take care when writing to other E register bits not to accidentally write 1 to the TEST bit. Automatically resets to 0 when power (VDD) is applied. s TEMP bit When set to 1, it enables the temperature sensor voltage output on pin VTEMP. When set to 0, VTEMP is high impedance. Automatically resets to 0 when power is applied. s Bank SEL bits Bank select bits for read/write operations. s STOP bit When set to 1, the clock 32Hz frequency divider counter stops and is reset. When set to 0, the clock restarts. s BUSY/ADJ bit This bit functions as a BUSY function in read mode, and as an ADJ function in write mode. • ADJ function (±30 seconds adjust bit) Second registers are reset to 00 and minute reg- isters not incremented when the clock counter is reset and the second registers are currently 00 to 29. Second registers are reset to 00 and minute reg- isters are incremented when the clock counter is reset and the second registers are currently 30 to 59. The ADJ bit is automatically reset to 0 a maxi- mum of 244 µs after it is set to 1, and thus the register should not be written to during this 244 µs interval. • BUSY function (second registers increment or ±30 seconds adjust busy indicator bit) When BUSY is 1, the counters are being updated (incremented or reset). To read or write to clock and calendar registers, the BUSY flag has to be 0. If reading data when BUSY is set to 1, there is a possibility that incorrect (intermedi- ate) data will be output. BUSY is set to 1 under the following two cir- cumstances. Bank A d dress Bit 3 Bit 2 Bit 1 Bit 0 0, 1, 2 E TEST TEMP F Bank SEL1 Bank SEL0 S T O P B U SY/ADJ Bank SEL1 Bank SEL0 Accessed bank 0 0 Bank 0 0 1 Bank 1 1 0 Bank 2 1 1 Bank 1 Normal seconds digit carry ±30 seconds digit adjust (when ADJ is set to 1) Carry complete 244 µs Adjust function complete max 244 µs Setting ADJ bit to "1" |
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