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MMSF2P02ER2 bảng dữ liệu(PDF) 1 Page - ON Semiconductor

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Publication Order Number:
MMSF2P02E/D
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 6
1
MMSF2P02E
Preferred Device
Power MOSFET
2 Amps, 20 Volts
P−Channel SO−8
These miniature surface mount MOSFETs feature ultra low RDS(on)
and true logic level performance. They are capable of withstanding
high energy in the avalanche and commutation modes and the
drain−to−source diode has a low reverse recovery time. MiniMOS
t
devices are designed for use in low voltage, high speed switching
applications where power efficiency is important. Typical applications
are dc−dc converters, and power management in portable and battery
powered products such as computers, printers, cellular and cordless
phones. They can also be used for low voltage motor controls in mass
storage products such as disk drives and tape drives. The avalanche
energy is specified to eliminate the guesswork in designs where
inductive loads are switched and offer additional safety margin against
unexpected voltage transients.
• Ultra Low RDS(on) Provides Higher Efficiency and Extends Battery
Life
• Logic Level Gate Drive − Can Be Driven by Logic ICs
• Miniature SO−8 Surface Mount Package − Saves Board Space
• Diode Is Characterized for Use In Bridge Circuits
• Diode Exhibits High Speed
• Avalanche Energy Specified
• Mounting Information for SO−8 Package Provided
• IDSS Specified at Elevated Temperature
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) (Note 1.)
Rating
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
20
Vdc
Gate−to−Source Voltage − Continuous
VGS
± 20
Vdc
Drain Current
− Continuous @ TA = 25°C (Note 2.)
− Continuous @ TA = 100°C
− Single Pulse (tp ≤ 10 μs)
ID
ID
IDM
2.5
1.7
13
Adc
Apk
Total Power Dissipation @ TA = 25°C
(Note 2.)
PD
2.5
Watts
Operating and Storage Temperature Range
TJ, Tstg
− 55 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 5.0 Vdc,
IL = 6.0 Apk, L = 12 mH, RG = 25 Ω)
EAS
216
mJ
Thermal Resistance − Junction to Ambient
(Note 2.)
RθJA
50
°C/W
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
TL
260
°C
1. Negative sign for P−Channel device omitted for clarity.
2. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided),
10 sec. max.
D
S
G
P−Channel
N−C
1
2
3
4
8
7
6
5
Top View
Source
Source
Gate
Drain
Drain
Drain
Drain
1
8
2 AMPERES
20 VOLTS
RDS(on) = 250 mW
Device
Package
Shipping
ORDERING INFORMATION
MMSF2P02ER2
SO−8
2500 Tape & Reel
SO−8
CASE 751
STYLE 13
http://onsemi.com
LYWW
MARKING
DIAGRAM
S4P01
L
= Location Code
Y
= Year
WW
= Work Week
PIN ASSIGNMENT
Preferred devices are recommended choices for future use
and best overall value.


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