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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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PIC16LF72/ML bảng dữ liệu(PDF) 96 Page - Microchip Technology |
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PIC16LF72/ML bảng dữ liệu(HTML) 96 Page - Microchip Technology |
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96 / 136 page  PIC16F72 DS39597B-page 94 2002 Microchip Technology Inc. FIGURE 14-4: EXTERNAL CLOCK TIMING TABLE 14-1: EXTERNAL CLOCK TIMING REQUIREMENTS OSC1 CLKO Q4 Q1 Q2 Q3 Q4 Q1 1 2 3 3 4 4 Parameter No. Symbol Characteristic Min Typ† Max Units Conditions FOSC External CLKI Frequency (Note 1) DC — 1MHz XT Osc mode DC — 20 MHz HS Osc mode DC — 32 kHz LP Osc mode Oscillator Frequency (Note 1) DC — 4 MHz RC osc mode 0.1 — 4 MHz XT Osc mode 4 5 — — 20 200 MHz kHz HS Osc mode LP Osc mode 1 TOSC External CLKI Period (Note 1) 1000 —— ns XT Osc mode 50 —— ns HS Osc mode 5 —— ms LP Osc mode Oscillator Period (Note 1) 250 —— ns RC Osc mode 250 — 10,000 ns XT Osc mode 50 — 250 ns HS Osc mode 5 —— ms LP Osc mode 2 TCY Instruction Cycle Time (Note 1) 200 TCY DC ns TCY = 4/FOSC 3 TosL, TosH External Clock in (OSC1) High or Low Time 500 —— ns XT oscillator 2.5 —— ms LP oscillator 15 —— ns HS oscillator 4 TosR, TosF External Clock in (OSC1) Rise or Fall Time — — 25 ns XT oscillator — — 50 ns LP oscillator —— 15 ns HS oscillator † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Instruction cycle period (TCY) equals four times the input oscillator time-base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at "min" values with an external clock applied to the OSC1/CLKI pin. When an external clock input is used, the "max" cycle time limit is "DC" (no clock) for all devices. |
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