SAA5502PS datasheet(39/80 Pages) PHILIPS

39 / 80 page

1999 Oct 27

Philips Semiconductors

Preliminary speciﬁcation

Standard TV microcontrollers with

On-Screen Display (OSD)

SAA55xx

Whenever a read or write is performed on TXT11, the row

values stored in TXT9 and column value stored in TXT10

are automatically incremented. For rows 0 to 24 the

column value is incremented up to a maximum of 39, at

which point it resets to ‘0’ and increments the row counter

value. When row 25 column 23 is reached the values of

the row and column are both reset to zero.

Writing values outside of the valid range for TXT9 or

TXT10 will cause undetermined operation of the

auto-incrementing function for accesses to TXT11.

17.3.2

TXT DISPLAY MEMORY MOVX ACCESS

It is important for the generation of OSD displays, that use

this mode of access, to understand the mapping of the

MOVX address onto the display row and column value.

This mapping of row and column onto address is shown in

Table 10. The values shown are added onto a base

address for the required memory block (see Fig.13) to give

a 16-bit address.

17.4

Page clearing

Page clearing is performed on request from either the Data

Capture block, or the microcontroller under the control of

the embedded software.

At power-on and reset the whole of the page memory is

cleared. The TXT13.PAGE CLEARING bit will be set while

this takes place.

17.4.1

DATA CAPTURE PAGE CLEAR

When a page header is acquired for the first time after a

new page request or a page header is acquired with the

erase (C4) bit set the page memory is ‘cleared’ to spaces

before the rest of the page arrives.

When this occurs, the space code (20H) is written into

every location of rows 1 to 23 of the basic page memory,

the appropriate packet 27 row of the extension packet

memory and the row where teletext packet 24 is written.

This last row is either row 24 of the basic page memory, if

the TXT0.X24 POSN bit is set, or row 0 of the extension

packet memory, if the bit is not set. Page clearing takes

place before the end of the TV line in which the header

arrived which initiated the page clear.

This means that the 1 field gap between the page header

and the rest of the page which is necessary for many

teletext decoders is not required.

17.4.2

SOFTWARE PAGE CLEAR

The software can also initiate a page clear, by setting the

TXT9.CLEAR MEMORY bit. When it does so, every

location in the memory block pointed to by

TXT15.BLOCK<3:0> is cleared to a space code (20H).

The CLEAR MEMORY bit is not latched so the software

does not have to reset it after it has been set.

Only one page can be cleared in a TV line so if the

software requests a page clear it will be carried out on the

next TV line on which the Data Capture hardware does not

force the page to be cleared. A flag, TXT13.PAGE

CLEARING, is provided to indicate that a software

requested page clear is being carried out. The flag is set

when a logic 1 is written into the TXT9.CLEAR MEMORY

bit and is reset when the page clear has been completed.

If TXT0.INV ON bit = 1 and a page clear is initiated on

Block 8 all locations are cleared to 00H.

Table 10 Column and row to MOVX address (lower 10 bits of address)

ROW

COL. 0

.....

COL. 23

.....

COL. 31 COL. 32

.....

COL. 39

Row 0

000H

.....

017H

.....

01FH

3F8H

.....

3FFH

Row 1

020H

.....

037H

.....

03FH

3F0H

.....

3F7H

::::::::

Row 23

2E0H

.....

3F7H

.....

2FFH

340H

.....

347H

Row 24

300H

.....

317H

.....

31FH

338H

.....

33FH

Row 25

320H

.....

337H

.....

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