ASM3P2811A/B, ASM3P2812A/B, ASM3P2814A/B

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2

Figure 1. Block Diagram

VDD

PLL

VCO

VSS

ModOUT

Loop

Filter

Output

Divider

Crystal

Oscillator

XOUT

XIN / CLKIN

Phase

Detector

D_C SRS FRS

Modulation

Frequency

Divider

Feedback

Divider

Table 1. PIN DESCRIPTION

Pin#

Pin Name

Type

Description

1

XIN / CLKIN

I

Crystal connection or external Clock input.

2

VSS

P

Ground to entire chip.

3

D_C

I

Digital logic input used to select Down (LOW) or Center (HIGH) spread options.

(Refer to Frequency Deviation and Spread Selection Table).

This pin has an internal pull−up resistor.

4

SRS

I

Spread range select. Digital logic input used to select frequency deviation

(Refer to Frequency Deviation and Spread Selection Table).

This pin has an internal pull−up resistor.

5

ModOUT

O

Spread spectrum clock output

6

FRS

I

Frequency range select. Digital logic input used to select Input frequency range

(Refer to Input/Output Frequency Range Selection Table).

This pin has an internal pull−up resistor.

7

VDD

P

Power supply for the entire chip.

8

XOUT

O

Crystal connection. If using an external reference, this pin must be left unconnected.

Table 2. INPUT/OUTPUT FREQUENCY RANGE SELECTION

FRS (pin 6)

Part Number

Modulation Rate

ASM3P2811 (1x)

ASM3P2812 (2x)

ASM3P2814 (4x)

Input

(MHz)

Output

(MHz)

Input

(MHz)

Output

(MHz)

Input

(MHz)

Output

(MHz)

0

10−20

10−20

10−20

20−40

10−20

40−80

Input Frequency / 448

1

20−40

20−40

20−40

40−80

20−40

80−160

Input Frequency / 896