LM5115A

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SNVS467B – DECEMBER 2006 – REVISED MARCH 2013

exceeds 45mV, the slow current limit amplifier gradually pulls down on COMP through the CO pin. Pulling COMP

low reduces the CRMIX signal and thereby reducing the operating duty cycle. By controlling the operating duty

cycle, the slow current limit amplifier will force a constant current mode of operation at the desired current limit

set point (Figure 23). A resistor in series with a capacitor are connected from the CO Pin to ground to provide

adequate control loop compensation for the slow current limit (Figure 21). The desired current limit set point,

hard on COMP through the CO pin. This will reduce the CRMIX signal to a voltage below the CV signal level.

Therefore, the PWM comparator will inhibit output pulses. Once the fault condition is removed, the fast current

limit amplifier will release COMP. Therefore, the CRMIX signal will increase to a normal operating threshold and

the switching will resume (Figure 24). A current limit fold-back feature is provided by the LM5115A to reduce the

peak output current delivered to a shorted load. When the common mode input voltage to the current sense

amplifier (CS and VOUT pins) falls below 2V, the current limit threshold is reduced from the normal level. At

common mode voltages > 2V, the current limit threshold is nominally 45mV. When VOUT is reduced to 0 V the

current limit threshold drops to 39mV to reduce stress on the inductor and power MOSFETs.

Vphase=10V

CH1 = CO, 5V/Div

CH2 = COMP, 5/Div

CH3 = Iout, 5A/Div

CH4 = SSPR Switch Signal, 5V/Div

Horizontal Resolution= 2 µs/Div

Figure 23. SSPR Steady State Current Limit (Output Shorted)

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