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AR0835HS bảng dữ liệu(PDF) 39 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  8 Mp CMOS Digital Image Sensor
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AR0835HS bảng dữ liệu(HTML) 39 Page - ON Semiconductor

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AR0835HS: 1/3.2-Inch 8 Mp CMOS Digital Image Sensor
Integration Time for Interlaced HDR Readout
AR0835HS_DS Rev. D Pub. 5/15 EN
39
©Semiconductor Components Industries, LLC, 2015.
Figure 28:
Bin2Pixel Readout (x_odd_inc = 3, y_odd_inc = 3, x_bin = 1)
Binning address sequencing is a bit more complicated than during subsampling only,
because of the implementation of the binning itself.
For a given column n, there is only one other column, n_bin, that can be binned with,
because of physical limitations in the column readout circuitry. The possible address
sequences are shown in Table 12.
There are no physical limitations on what can be binned together in the row direction. A
given row n will always be binned with row n+2 in 2X subsampling mode and with row
n+4 in 4X subsampling mode. Therefore, which rows get binned together depends upon
the alignment of y_addr_start. The possible sequences are shown in Table 13 on page 40.
Table 12:
Column Address Sequencing During Binning
odd_inc = 1 (Normal)
odd_inc = 3 (2X Bin)
odd_inc = 7 (2X Skip + 2XBin)
x_addr_start = 0
x_addr_start = 0
x_addr_start = 0
00/2
0/4
11/3
1/5
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3
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55/7
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