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ML6691 bảng dữ liệu(PDF) 2 Page - Micro Linear Corporation

tên linh kiện ML6691
Giải thích chi tiết về linh kiện  100BASE-T MII-to-PMD Transceiver
PDF  10 Pages
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nhà sản xuất  MICRO-LINEAR [Micro Linear Corporation]
Trang chủ  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML6691 bảng dữ liệu(HTML) 2 Page - Micro Linear Corporation

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ML6691
2
PIN CONFIGURATION
ML6691
44-PIN PLCC (Q44)
TSM4
TSM3
TSM2
TSM1
TSM0
SD
RSM4
RSM3
RSM2
RSM1
RSM0
TXER
TXD3
TXD2
TXD1
TXD0
CRS
COL
RXD3
RXD2
RXD1
RXD0
18
19 20
21
22
23
24
7
8
9
10
11
12
13
14
15
16
17
65
4
3
2
39
38
37
36
35
34
33
32
31
30
29
144
25
43
26
42
27
41
28
40
PIN#
NAME
FUNCTION
1,21
VCC
Positive 5 volt supply.
2,3,4,
AD[4:0]
Local PHY address. These 5 inputs set
43,44
the address to which the local physical
layer responds. When an address
match is detected, the CS output is
asserted.
5
TXCLK
Transmit clock output. Continuous
25MHz clock provides the timing
reference for the transfer of TXEN,
TXER, and TXD[3:0] from the MAC.
TXCLK is generated from the TXC
input.
6
TXEN
Transmit enable input. A logic high
enables the transmit section of the
ML6691. This signal indicates the
MAC is transmitting nibble-wide data.
TXEN is synchronous to TXCLK.
7
TXER
Transmit error input. When TXER is
high , while TXEN is asserted, the
ML6691 will insert an “H” symbol in
the data stream. TXER is synchronous
to TXCLK.
8-11
TXD[3:0] Transmit nibble data inputs. Nibble-
wide data from the MAC. For data
transmission TXEN must be asserted.
TXD[0] is the least significant bit.
TXD[3:0] is synchronous to TXCLK.
PIN DESCRIPTION
12
CRS
Carrier sense output. A logic high
indicates that either the transmit or
receive medium is non-idle. CRS is
deasserted when both transmit and
receive are idle.
13
COL
Collision detect output. A logic high
indicates a collision (simultaneous
transmit and receive in half duplex
mode).
14-17
RXD[3:0] Receive nibble data outputs. Nibble-
wide data for transmission to the MAC.
RXD[0] is the least significant bit.
RXD[3:0] is synchronous to RXCLK.
18
RXDV
Receive data valid output. A logic high
indicates the ML6691 is presenting
valid nibble-wide data. RXDV shall
remain asserted from the first
recovered nibble of the frame through
the final recovered nibble. RXDV will
be de-asserted prior to the first RXCLK
that follows the final nibble. RXDV is
synchronous to RXCLK.
19
RXER
Receive error output. Active high,
indicates that a coding error was
detected. RXER is synchronous to
RXCLK.
PIN#
NAME
FUNCTION



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