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ML2111CIP bảng dữ liệu(PDF) 2 Page - Micro Linear Corporation |
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ML2111CIP bảng dữ liệu(HTML) 2 Page - Micro Linear Corporation |
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2 / 26 page ![]() ML2111 2 PIN DESCRIPTION PIN NAME FUNCTION 1LPA Lowpass output for biquad A. 2BPA Bandpass output for biquad A. 3 N/AP/HPA Notch/allpass/highpass output for biquad A. 4 INVA Inverting input of the summing op amp for biquad A. 5S1A Auxiliary signal input pin used in modes 1a, 1d, 4, 5, and 6b. 6SA/B Controls S2 input function. 7VA+ Positive analog supply. 8VD+ Positive digital supply. 9 LSh Reference point for clock input levels. Logic threshold typically 1.4V above LSh voltage. 10 CLKA Clock input for biquad A. PIN NAME FUNCTION 11 CLKB Clock input for biquad B. 12 50/100/HOLD Input pin to control the clock-to- center-frequency ratio of 50:1 or 100:1, or to stop the clock to hold the last sample of the bandpass or lowpass outputs. 13 VD- Negative digital supply. 14 VA- Negative analog supply. 15 AGND Analog ground. 16 S1B Auxiliary signal input pin used in modes 1a, 1d, 4, 5, and 6b. 17 INVB Inverting input of the summing op amp for biquad B. 18 N/AP/HPB Notch/allpass/highpass output for biquad B. 19 BPB Bandpass output for biquad B. 20 LPB Lowpass output for biquad B. PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 LPA BPA N/AP/HPA INVA S1A SA/B VA+ VD+ LSh CLKA LPB BPB N/AP/HPB INVB S1B AGND VA- VD- 50/100/HOLD CLKB TOP VIEW ML2111 20-Pin PDIP (P20) 20-Pin SOIC (S20) |
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