8

7

6

5

4

3

2

1

FB

VIN

Exposed Pad on Bottom

Connect to Ground

VCC

RT/SD

SW

BST

RCL

RTN

1

2

3

4

5

8

7

6

FB

VIN

VCC

RT/SD

SW

BST

RCL

RTN

SM72485

SNVS697D – JANUARY 2011 – REVISED APRIL 2013

www.ti.com

Connection Diagram

Figure 1. Top View

Figure 2. Top View

8-Lead WSON

8-Lead VSSOP

PIN DESCIPTIONS

Pin

Name

Description

Application Information

1

SW

Switching Node

Power switching node. Connect to the output inductor, re-circulating diode, and

bootstrap capacitor.

2

BST

Boost Pin (Boot–strap capacitor

An external capacitor is required between the BST and the SW pins. A 0.01 µF

input)

ceramic capacitor is recommended. An internal diode charges the capacitor from

3

RCL

Current Limit OFF time set pin

A resistor between this pin and RTN sets the off-time when current limit is

detected. The off-time is preset to 35 µs if FB = 0V.

4

RTN

Ground pin

Ground for the entire circuit.

5

FB

Feedback input from Regulated

This pin is connected to the inverting input of the internal regulation comparator.

Output

The regulation threshold is 2.5V.

6

RT/SD

On time set pin

The minimum recommended on time is 400 ns at the maximum input voltage.

This pin can be used for remote shutdown.

7

VCC

Output from the internal high

This regulated voltage provides gate drive power for the internal Buck switch. An

voltage series pass regulator.

internal diode is provided between this pin and the BST pin. A local 0.47 µF

decoupling capacitor is required. The series pass regulator is current limited to 9

mA.

8

VIN

Input voltage

Input operating range: 6V to 95V.

EP

Exposed Pad

The exposed pad has no electrical contact. Connect to system ground plane for

reduced thermal resistance.

2

Submit Documentation Feedback

Copyright © 2011–2013, Texas Instruments Incorporated

Product Folder Links: SM72485