PIC16LC71-04SLASHSP datasheet(48/176 Pages) MICROCHIP

48 / 176 page

PIC16C71X

DS30272A-page 48

FIGURE 8-2:

CONFIGURATION WORD, PIC16C710/711

FIGURE 8-3:

CONFIGURATION WORD, PIC16C715

CP0

BODEN

CP0

PWRTE WDTE FOSC1 FOSC0

CONFIG

Address

2007h

bit13

bit0

bit 13-7 CP0: Code protection bits (2)

5-4: 1 = Code protection off

0 = All memory is code protected, but 00h - 3Fh is writable

bit 6:

BODEN: Brown-out Reset Enable bit (1)

1 = BOR enabled

0 = BOR disabled

bit 3:

PWRTE: Power-up Timer Enable bit (1)

1 = PWRT disabled

0 = PWRT enabled

bit 2:

WDTE: Watchdog Timer Enable bit

1 = WDT enabled

0 = WDT disabled

bit 1-0:

FOSC1:FOSC0: Oscillator Selection bits

= RC oscillator

= HS oscillator

= XT oscillator

= LP oscillator

Note 1:

Enabling Brown-out Reset automatically enables Power-up Timer (PWRT) regardless of the value of bit PWRTE.

Ensure the Power-up Timer is enabled anytime Brown-out Reset is enabled.

All of the CP0 bits have to be given the same value to enable the code protection scheme listed.

CP1

CP0

CP1

CP0

CP1

CP0 MPEEN BODEN

CP1

CP0

PWRTE WDTE FOSC1 FOSC0

CONFIG

Address

2007h

bit13

bit0

bit 13-8

CP1:CP0: Code Protection bits (2)

5-4:

= Code protection off

= Upper half of program memory code protected

= Upper 3/4th of program memory code protected

= All memory is code protected

bit 7:

MPEEN: Memory Parity Error Enable

1 = Memory Parity Checking is enabled

0 = Memory Parity Checking is disabled