TC4467 datasheet(10/22 Pages) MICROCHIP

10 / 22 page

TC4467/TC4468/TC4469

DS21425B-page 10

 2002 Microchip Technology Inc.

resistive-load-caused

dissipation

for

supply-

referenced loads is a function of duty cycle, load

current and output voltage. The power dissipation is

EQUATION

Quiescent power dissipation depends on input signal

duty cycle. Logic HIGH outputs result in a lower power

dissipation mode, with only 0.6 mA total current drain

(all devices driven). Logic LOW outputs raise the

current to 4 mA maximum. The quiescent power

dissipation is:

EQUATION

Transition power dissipation arises in the complimen-

tary configuration (TC446X) because the output stage

N-channel and P-channel MOS transistors are ON

simultaneously for a very short period when the output

changes.

The

transition

power

dissipation

approximately:

EQUATION

Package power dissipation is the sum of load,

quiescent and transition power dissipations. An

example shows the relative magnitude for each term:

Maximum operating temperature is:

EQUATION

FIGURE 4-1:

Switching Time Test Circuit.

DVOIL

Load Current

Device Output Voltage

DDuty Cycle

VS DIH

()

–

()IL

()

Quiescent Current with all outputs HIGH

Quiescent Current with all outputs LOW

DDuty Cycle

Supply Voltage

(4 mA max.)

(0.6 mA max.)

Note:

Ambient operating temperature should not

exceed +85°C for "EJD" device or +125°C

for "MJD" device.

fVs 10 10

–

()

15 V

1000 pF Capacitive Load

50%

f200 kHz

Package Power Dissipation

PL PQ PT

45mW 35mW 30mW

110mW

TJ θJA PD

()

–

141

°C

θJA

Junction-to-ambient thernal resistance

Maximum allowable junction temperature

(+150

°C )

(83.3

°C/W) 14-pin plastic package

VOUT

470 pF

1 µF Film

0.1 µF Ceramic

90%

10%

90%

+5 V

Input

(A, B)

VDD

Output

90%

VDD

tD1

tD2

Input: 100 kHz,

square wave,

tRISE = tFALL ≤ 10 nsec

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